Performance

I was a bit worried that the performance of the Cortex M0+ was going to be a bit sad... So far it is looking fairly good. As an indication of how we are traveling here is the Triple Sine Oscillator (RING on the display).

The sampling is running at 96kHz and this is taken from the DAC output on the micro-controller, no filtering yet. This is the performance of the above calculations:

 

This is a performance pin that gets set before the render function call and cleared after. It is currently running at about 53% of the processor load. This is with the processor updating the DAC from and an ISR not using DMA so there is a bit of a penalty there. The render function is also doing 38 samples per call (you can see that the frequency is 96kHz/38 or 2.52KHz). I plan to make the # of samples configurable dependent upon the oscillator. Oliver did this in a more dynamic way using a queue but with the DMA controller is is sort of just easier to use fixed lengths... Maybe when we get more into it we could use some sort of dynamic DMA size method... Why do we care? well the various analog parameters only get updated at the beginning of a render call, not continuously, so the Oscillator will appear more responsive to modulation the smaller the number of samples calculated...